Multiple layers are built upon a substrate during the fabrication of an integrated circuit. These layers define various electrical structures of the integrated circuit. The alignment of the layers requires accuracy and precision. Typically, alignment marks are included in one or more of the initial layers, and the masks for the subsequent layers are aligned to these alignment marks. Thus, the accuracy of the alignment tends to be dependent upon the clarity and accuracy of the alignment marks. As layers of the integrated circuit are built up, etched, polished, and removed, the alignment marks might be completely removed, significantly altered, or covered during the fabrication of the integrated circuit. As a result, the subsequent layers of the integrated circuit may be misaligned as the alignment marks are changed during processing. Even the slight misalignment of a layer during the fabrication of the integrated circuit can cause one or more components of the integrated circuit to malfunction. Thus, misalignment of a layer tends to reduce the process yield and increase the cost of the integrated circuits. Moreover, misalignment of a layer can create device reliability issues.
What is needed, therefore, is a system for reliably aligning the various layers of an integrated circuit to a substrate.